Optimized Local I O ESD Protection for SerDes In Advanced SOI, BiCMOS and FinFET Technology from semiconductor nodes Watch Video
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⏲ Duration: 10 min 15 sec ✓ Published: 16-Sep-2021
Description: Semiconductor companies are developing ever faster interfaces to satisfy the need for higher data throughputs. However, the parasitic capacitance of the traditional ESD solutions limits the signal frequency. This paper demonstrates low-cap Analog I/Os for high speed SerDes (28Gbps to 112Gbps) circuits created in advanced BiCMOS, SOI and FinFET nodes.nAccepted for and presented at the 1st International EOS/ESD Symposium on Design and System (IEDS)
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