Using Hardware Description Languages in TINACloud, part 2: Creating Macros from Verilog from verilog online tutorial Watch Video
Preview(s):
Gallery
Play Video: (Note: The default playback of the video is HD VERSION. If your browser is buffering the video slowly, please play the REGULAR MP4 VERSION or Open The Video below for better experience. Thank you!)
Description: Hardware Description Languages (HDL) are powerful tools to describe and simulate complex electronic devices.nnIn this tutorial video we will show how you can create a macro from a Verilog (.v) code and use in TINACloud. You can create macros from VHDL, Verilog-A and Verilog-AMS files in a similar way.nnWatch our tutorial video to see howyou can create a macro from a Verilog (.v) code and use in TINACloud.nDownload the FREE trial demo of TINA Design Suite and get:nn1. One year free access to TI
Play Video: (Note: The default playback of the video is HD VERSION. If your browser is buffering the video slowly, please play the REGULAR MP4 VERSION or Open The Video below for better experience. Thank you!)